1-out-n-decoder - 1-aus-n-Decoder
A 1-out-of-n decoder is a circuit with n outputs and log 2 ( n ) inputs. In practice, however, the number of inputs must be rounded up to the nearest whole number if log 2 ( n ) is not a whole number. The output addressed in each case goes high when the binary number A at the input corresponds to the number J of the relevant output y J. The other outputs are then not activated and remain at low.
|A=J||a 1||a 0||y 3||y 2||y1||y 0|
This logic function is also used in complex integrated logic components. For example, this function is used as a line decoder and column decoder for addressing the lines and columns in memory components ( RAM , ROM , EEPROM , ...). In addition, this logic function can also be implemented in a programmable logic circuit (PLD) or an FPGA component or an ASIC component.