3964R - 3964R
The 3964 / 3964R protocol is a serial point-to-point protocol for communication between two programmable logic controllers (PLC). It is a master / master protocol . This means that with this protocol, a PLC can manipulate the memory locations (data words) of the partner PLC directly and without asking. In the event of a conflict, a priority parameter controls the priority.
The data is transmitted in full duplex mode , i.e. in both directions at the same time.
The only difference between the 3964 variant and the 3964R protocol is the lack of the Cyclic_Redundancy_Check (CRC), which enables more reliable transmission.
A proper transfer looks like this:
|(BCC)||→||Only with 3964R|
In the data area, each DLE character to be transmitted (0x10 hex ) must be doubled in order to distinguish it from the DLE at the end of the data area. BCC is the checksum of the 3964R protocol, it does not exist with 3964. The checksum corresponds to the even longitudinal parity of all transmitted data bytes, i.e. their XOR link .
Several error situations are possible:
- The receiver responds to STX with NAK (or any other character than DLE or STX). The attempt to send must then be repeated later because the recipient is not ready.
- The recipient replies to STX with STX, so he wants to send himself. One of the two partners has to give in and postpone his own transmission request. It sends DLE, indicating that it is ready to receive.
- The receiver responds to DLE ETX with NAK (or any other character than DLE). The attempt to send must then be repeated because a checksum error has occurred.
- The recipient does not respond within the acknowledgment delay time. Then (after any further unsuccessful attempts) it can be assumed that the recipient is faulty.